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RM320.00

• Power Supply: VDD=1.2V Typical
• VDDQ = 1.2V Typical
• VPP - 2.5V Typical
• VDDSPD=2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Dual-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 16 internal banks; 4 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.23” (31.25mm)
• RoHS Compliant and Halogen-Free

RM320.00

This document describes ValueRAM's KVR26S19D8/16 is a 2G x 64-bit (16GB) DDR4-2666 CL19 SDRAM (Synchronous DRAM), 2Rx8, non-ECC, memory module, based on sixteen 1G x 8-bit FBGA components.

RM278.00

• Power Supply: VDD=1.2V Typical
• VDDQ = 1.2V Typical
• VPP - 2.5V Typical
• VDDSPD=2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) fordata, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Dual-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 16 internal banks; 4 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.23” (31.25mm)
• RoHS Compliant and Halogen-Free

 

RM320.00

• JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 667MHz fCK for 1333Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), single sided component

RM72.00

• JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 667MHz fCK for 1333Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 9, 8, 7, 6, 5
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), single sided component

RM72.00

• JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 800MHz fCK for 1600Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 11, 10, 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or   MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), single sided component

RM72.00

• JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V) Power Supply
• VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
• 800MHz fCK for 1600Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 11, 10, 9, 8, 7, 6, 5
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), single sided component

RM72.00

• Power Supply: VDD = 1.2V Typical
• VDDQ = 1.2V Typical
• VPP = 2.5V Typical
• VDDSPD = 2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Single-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 8 internal banks; 2 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.23” (31.25mm)
• RoHS Compliant and Halogen-Free

RM92.00

This document describes ValueRAM KVR26S196/4 as a 512M x 64-bit (4GB) DDR4-2666 CL19 SDRAM (Synchronous DRAM), 1Rx16,memory module, based on four 512M x 16-bit FBGA components.

RM87.00

• JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 667MHz fCK for 1333Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration: Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB: Height 0.740” (18.75mm) or 1.180” (30.00mm)

RM95.00

-JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 667MHz fCK for 1333Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB: Height 1.18” (30mm), double sided component

RM95.00

• JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 800MHz fCK for 1600Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 11, 10, 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 0.740” (18.75mm) or 1.180” (30.00mm)

RM95.00

• Power Supply: VDD=1.2V Typical
• VDDQ = 1.2V Typical
• VPP - 2.5V Typical
• VDDSPD=2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Single-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 16 internal banks; 4 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.23” (31.25mm)

RM187.00

• Power Supply: VDD = 1.2V Typical
• VDDQ = 1.2V Typical
• VPP = 2.5V Typical
• VDDSPD = 2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Single-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 8 internal banks; 2 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.23” (31.25mm)
• RoHS Compliant and Halogen-Free

RM94.00

• JEDEC standard 1.5V (1.425V ~ 1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 800MHz fCK for 1600Mb/sec/pin
• 8 independent internal banks
• Programmable CAS latency: 11, 10, 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
• Burst Length: 8 (interleave without any limit, sequential withstarting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write (either on the fly using A12 or MRS)
• Bi-directional Differential Data Strobe
• Internal (self) calibration: Internal self calibration through ZQ
 pin (RZQ: 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,3.9us at 85°C < TCASE < 95°Cº
• Asynchronous Reset
• PCB: Height 0.740” (18.75mm) or 1.180” (30.00mm)

RM175.00

• Power Supply: VDD=1.2V Typical
• VDDQ = 1.2V Typical
• VPP - 2.5V Typical
• VDDSPD=2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Single-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 16 internal banks; 4 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.23” (31.25mm)
• RoHS Compliant and Halogen-Free

RM161.00

• Power Supply: VDD=1.2V Typical
• VDDQ = 1.2V Typical
• VPP - 2.5V Typical
• VDDSPD=2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Single-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 16 internal banks; 4 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.23” (31.25mm)
• RoHS Compliant and Halogen-Free

RM165.00

RAM (DESKTOP)

8 GB

DDR4

2666MHZ

 

 

RM165.00
  • Full frame 120° ultra wide angle lighting
  • Built-in Force Flow RGB lighting effect
  • Aluminum alloy heat spreader with asymmetric minimalist design
  • Supports T-FORCE BLITZ control (Beta version)
  • Supports ASUS Aura Sync software synchronization
  • Latest JEDEC RC 2.0 PCB
  • Energy saving 1.2V~1.4V ultra low working voltage
  • Supports XMP2.0 one-click overclocking technology
  • QVL approved by all mainstream motherboard manufacturers
RM398.00